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LED Indicator Interface For ECL Logic

IP.com Disclosure Number: IPCOM000067914D
Original Publication Date: 1979-Oct-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Kane, PH [+details]

Abstract

The figure illustrates a circuit for detecting high and low logic levels for multiple emitter coupled logic (ECL) outputs. Diode D1 and resistor R1 are used to develop a voltage at node 5 intermediate the voltages impressed at terminals 7 and 8. The ECL outputs are connected respectively to the terminals 6 leading to light-emitting diodes (LEDs) 1 through N. The resistance value of R1 is selected such that the current through R1 is equal to or greater than the current required to simultaneously turn on the total number of LEDs 1 through N connected to node 5 and sufficient to forward bias the diode D1.