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High Speed Exclusive-OR Circuit

IP.com Disclosure Number: IPCOM000068046D
Original Publication Date: 1979-Nov-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Ehrlickman, RL [+details]

Abstract

Conventional implementation of the exclusive-OR (XOR) function requires four internal NAND cells. The logical diagram is shown in Fig. 1. The high speed XOR circuit shown in Fig. 2 requires only two internal cells. In addition, the time delay performance is enhanced by a factor of two.