The following operators can be used to better focus your queries.
( ) , AND, OR, NOT, W/#
? single char wildcard, not at start
* multi char wildcard, not at start
(Cat? OR feline) AND NOT dog?
Cat? W/5 behavior
(Cat? OR feline) AND traits
Cat AND charact*
This guide provides a more detailed description of the syntax that is supported along with examples.
This search box also supports the look-up of an IP.com Digital Signature (also referred to as Fingerprint); enter the 72-, 48-, or 32-character code to retrieve details of the associated file or submission.
Concept Search - What can I type?
For a concept search, you can enter phrases, sentences, or full paragraphs in English. For example, copy and paste the abstract of a patent application or paragraphs from an article.
Concept search eliminates the need for complex Boolean syntax to inform retrieval. Our Semantic Gist engine uses advanced cognitive semantic analysis to extract the meaning of data. This reduces the chances of missing valuable information, that may result from traditional keyword searching.
This is an improved depletion-mode MOS (DMOS) transistor structure having a highly controllable channel length and uniform P+ doping along the channel.
English (United States)
This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately
85% of the total text.
Page 1 of 2
Double Polysilicon Depletion Mode MOS Transistor Structure
This is an improved depletion-mode MOS (DMOS) transistor structure
having a highly controllable channel length and uniform P+ doping along the
The process utilizes two separate polysilicon deposition steps,
double polysilicon (DPS) processes being well known. As seen in Fig.
1, a P- substrate has deposited thereon a layer of thin oxide SiO(2).
A first polysilicon layer (poly 1) is deposited. Subsequent
photolithographic processes remove the poly 1 from everywhere except
where the photoresist to define the poly 1 remains. An additional
photoresist step then takes place to block the drain area. This is
followed with a P ion implantation step in which the photoresist to
define the poly 1 protects the poly 1 while the photoresist to block
the drain protects the drain region. In a subsequent step, as better
seen in Fig. 2, all the photoresist is removed, and a second
polysilicon layer (P2) is deposited. A new photoresist layer is then
deposited to protect the second polysilicon layer (P2) from a
subsequent etching step.
As best seen in Fig. 3, after suitable photolithographic processes, a reactive
ion etch (RIE) is utilized to define the polysilicon 2 regions (P2) to leave this
material in the illustrated areas. Subsequently, N+ impurities, such as arsenic or
antimony, are introduced into the substrate to form the illustrated N+ areas. The
resultant structure forms a depletion-mode MOS device on the l...