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Thin Film Plating Procedure

IP.com Disclosure Number: IPCOM000068121D
Original Publication Date: 1979-Nov-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Church, MA [+details]

Abstract

To overcome the problem of variations and thicknesses of thin films on wafers. a matrix of vias 1 through an isolator layer 2 is employed. The distance between vias is equal, and all vias are tied together. Thus, all plating contacts would have equal resistances, resulting in uniform thickness of the plated thin films and wafers.