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Josephson Island Ground Memories Disclosure Number: IPCOM000068160D
Original Publication Date: 1979-Nov-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue


Related People

Arnett, PC Faris, SM [+details]


This article relates to a special grounding technique to improve the speed of Josephson memories as well as reduce power dissipation and improve the density of such memories. Almost all delay components in present memory designs result from current transfer times into long closed loops. A loop is usually connected across each of a plurality of serially arranged transfer devices which are driven by a common DC current source. This configuration is desirable because it allows use of low level, well regulated DC sources, and hence makes possible circuit designs with acceptable operating margins. The following limitations are encountered, however, as one attempts to improve the speed: 1.