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Annealing To Reduce The Trap Density In A MOSFET Gate Dielectric

IP.com Disclosure Number: IPCOM000068262D
Original Publication Date: 1979-Dec-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Hu, CC [+details]

Abstract

A one-half hour annealing of a MOSFET device at 600 degrees C in forming gas (for example, 85% N(2), 15% H(2)) has been found to reduce the positive and neutral trap densities in the gate dielectric of the MOSFET device to lower than or equal to those prior to radiation damage. Annealing at temperature higher than 600 degrees C improves the effect of annealing due to the activation. However, the growth of silicon nitride in the silicon contact regions is a concern.