Browse Prior Art Database

Multi-Circuit Masterslice Disclosure Number: IPCOM000068268D
Original Publication Date: 1979-Dec-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue


Related People

Berndlmaier, E Dorler, JA Mosely, J [+details]


Described is a VLSI cell design concept. Rather than design a cell layout which is optimized for one type of logic, much leverage is possible by designing the layout so that more than one logic type may be implemented. A multi-circuit masterslice then results, which decreases the number of masterslices required.