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Memory Addressing Scheme For Loosely Coupled Processors

IP.com Disclosure Number: IPCOM000068325D
Original Publication Date: 1979-Dec-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Marton, K Newman, PS Summers, RC Wood, C [+details]

Abstract

A memory addressing scheme is described for a loosely-coupled processor configuration with a limited amount of secondary storage; the configuration is oriented towards supporting quick-response interactive functions.