Browse Prior Art Database

Self Aligned Silicon MESFET or JFET Disclosure Number: IPCOM000068343D
Original Publication Date: 1979-Dec-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue


Related People

Ning, TH Solomon, PM Yu, HN [+details]


A process is described for making silicon metal-silicon field-effect transistors (MESFETs) or junction field-effect transistors (JFETs) which uses n+ polysilicon source and drain contacts, enabling an implanted channel and Schottky barrier or p polysilicon gate to be self aligned with the source and drain, which are outdiffused from the polysilicon contacts.