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Parity Prediction For Fast ThreeInput Adder

IP.com Disclosure Number: IPCOM000068429D
Original Publication Date: 1979-Sep-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Olin, KE Weinberger, A [+details]

Abstract

The parity predict signals of the sum for a 3-bit adder are implemented here in three levels.