Browse Prior Art Database

High Performance Package

IP.com Disclosure Number: IPCOM000068527D
Original Publication Date: 1978-Jan-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Berndlmaier, E Dorler, JA [+details]

Abstract

Disclosed is a semiconductor packaging structure for minimizing module dimensions while maintaining high input/output (I/0) count. Given a fixed number of module I/Os connected in a planar array, and excluding module power dissipation restrictions, the minimum dimensions of the module are determined by the pin dimensions, pin via dimensions and the required number of signal lines of the card/board assembly.