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Substrate Voltage Transient Reduction Circuit

IP.com Disclosure Number: IPCOM000068589D
Original Publication Date: 1978-Jan-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Bula, J Kurian, TJ Patrawala, AC [+details]

Abstract

In a field-effect transistor read-only store (FET ROS) the substrate voltage transient is caused mainly by charging and discharging of the array. The voltage transient contribution due to switching off peripheral circuits is minimum. The proposed circuit balances the charges in and out of substrate voltage node due to array charging and discharging, thereby maintaining constant charge at the substrate node at all times. This reduces the substrate voltage bounce.