Output Buffer for Latch Circuit
Original Publication Date: 1978-Jan-01
Included in the Prior Art Database: 2005-Feb-20
In unbuffered field-effect transistor (FET) latch circuits, the input pulse width required to change the latch state is sensitive to the load capacitance on its outputs, i.e., to its fanout in each particular circuit. Adding conventional buffer inverters to the latch outputs removes this dependency, but increases the overall delay.