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Nonlatching Logic Circuits With Josephson Junctions

IP.com Disclosure Number: IPCOM000068639D
Original Publication Date: 1978-Jan-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Gueret, P [+details]

Abstract

Josephson junction (A) is operated closely around gap voltage V(g). It is biased with a voltage V(o) such that it is always kept in its voltage state. When no input signal is present, superconducting Josephson gate (B) shunts load resistor RL, thus inhibiting output current I-out of the logic circuit. In junction (A) a large current change occurs from operating point R to operating point S when the voltage V across the junction changes from just below V(g) to just above V(g). Such a current swing is caused by self-resetting input logic gates in the bias line of junction (A). High junction current controls Josephson gate (B) to switch into the voltage state. Current transfer to load resistor RL controls further gates as output current I-out.