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Totem Pole Logic

IP.com Disclosure Number: IPCOM000068704D
Original Publication Date: 1978-Feb-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Farley, RT Varadarajan, HD [+details]

Abstract

The totem-pole logic (TPL) circuit (Fig. 2) is an extension of the Schottky transistor logic (STL) circuit (Fig. 1). The collector resistor in the STL circuit limits the circuits turn-off speed, and makes a significant contribution to the overall power dissipation of the circuit. The TPL circuit replaces this resistor with a switched PNP transistor to remove the resistor's limitations.