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Error Migration Protection for Multiprocessor with Hierarchical Memory

IP.com Disclosure Number: IPCOM000068752D
Original Publication Date: 1978-Feb-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Chen, CL Hsiao, MY [+details]

Abstract

In a multiprocessing system with a storage hierarchy design, data is always stored in the buffer level (L1) and then propagated to main storage level L3 and other levels, such as disc L4 (not shown) and tape library L5 (not shown). Since each level uses a different storage device due to cost and performance reasons, the error correcting codes (ECCs) are different at each level. For example, a simple parity check could be used on L1 data. A SEC-DED (single error correction-double error detection) code could be used in L3 to correct/detect main memory error. In L4 a burst ECC, such as a b-adjacent ECC in interleaved form, could be used to correct more errors. In L5, an even more powerful ECC, for example, three-symbol correction, could be used.