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This article relates to the optimization of the baking time and temperature of a semiconductor wafer prior to the deposition of a 2-micron epitaxial (epi) layer in a barrel reactor.
English (United States)
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Baking Process Prior to Epitaxial Deposition
This article relates to the optimization of the baking time and temperature of
a semiconductor wafer prior to the deposition of a 2-micron epitaxial (epi) layer in
a barrel reactor.
It has been found that the effect of the arsenic subcollector diffusion on the
epitaxial layer is minimized by increasing the hydrogen bake cycle prior to
epitaxial deposition. This results in better process control at epi while increasing
the epi Co, thereby decreasing the forward voltages of Schottky barrier diodes
formed in the epitaxial layer and of the variance in the forward voltages.
It was also found that this increased bake cycle had a significant effect by
improving collector-to-emitter leakage.
The process involves slowly heating the chamber containing the wafers for
around 15 minutes to a temperature of around 1100 Degrees C, followed by an
optimum time of around 20 minutes at the same temperature prior to the
deposition of the epitaxial layer.