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Simultaneous Formation of High Shift Resistance Ion Implanted Resistors and Impurity Gettering for Bipolar Transistors

IP.com Disclosure Number: IPCOM000068954D
Original Publication Date: 1978-Mar-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Putney, ZC [+details]

Abstract

The purpose of this method is to simultaneously (1) provide a means of adding high value, low temperature coefficient of resistance (TCR) implanted resistors to a conventional ion-implanted base bipolar integrated circuit process, utilizing the standard base implant and minimum additional process steps and (2) provide topside wafer implant gettering to increase the leakage-limited yield of the integrated circuit.