Testing of LSI Logic Circuits containing "Imbedded" Shift Arrays
Original Publication Date: 1978-Mar-01
Included in the Prior Art Database: 2005-Feb-20
LSI (large-scale integration) logic circuits containing "imbedded" shift arrays can be tested without direct probing connections to individual array stages. In normal "computational" mode, combinatorial logic 1 receives outputs A, B...F of shift arrays SR1 - SRN in parallel, in combination with external data inputs 3, and transfers a function of its inputs in parallel into the shift arrays.