Browse Prior Art Database

Cycle Squeeze Principle of Operation in Processor Systems

IP.com Disclosure Number: IPCOM000069063D
Original Publication Date: 1978-Mar-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Tsui, F [+details]

Abstract

In modern computer design, the "cycle steal" mode of operation is a well-known and established practice. The name "cycle steal" refers to an arrangement which allows an I/O device to "steal" a machine cycle, during which the computing activity in the processing unit will be stopped and the I/O device will be "served" (i.e., given access to the memory). This cycle-steal approach offers the advantage that an interruption of the processing will occur only when the I/O device concerned is actually ready to make or take a data transfer, so that unnecessary waiting and idling on the part of the processing unit can be avoided. An alternative approach known for reducing interruptions has been to use a special memory construction which allows simultaneous double addressing.