Integration of Contention and Allocation for Multiaccess Busses
Original Publication Date: 1978-Mar-01
Included in the Prior Art Database: 2005-Feb-20
In multiple processor systems, equitable sharing of a bus or other serially reusable resource, without centralized control, is desirable. In contention-based multiaccess systems, data transmission occurs at intervals known to each attachment. In order to add preallocated access to a contention-based scheme, a clock signal is required each time a fixed number of transmission intervals occurs. This signal will define a "frame" for the purposes of preallocated transmission.