Shared Bit Line Sensing for Two Device Cell
Original Publication Date: 1978-Apr-01
Included in the Prior Art Database: 2005-Feb-20
Two-device memory cells, such as described in the IBM Technical Disclosure Bulletin 18, 786-787 (August 1975), provide certain performance advantages over simpler single-device memory cells, but present device layout problems when maximum density of cells is desired. This bit line sensing technique enables the density of memory array layouts to be improved.