Power Dissipation Reduction Logic Circuitry
Original Publication Date: 1978-Apr-01
Included in the Prior Art Database: 2005-Feb-20
In computer systems, many subsystems operate at sixty percent or less utilization. Thus, full power is required only sixty per cent or less of the time. Power dissipation is reduced by utilizing the signal indicating that the system or subsystems are in a wait state to switch a load element off.