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Diagnostic Technique for Stuck Latch Defects in Shift Register String Disclosure Number: IPCOM000069306D
Original Publication Date: 1978-Apr-01
Included in the Prior Art Database: 2005-Feb-20

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Hsu, FC [+details]


Shift registers can be tested by loading a known pattern (e.g., alternating 1's and 0's) and loading it while observing the output. If any of the latches failed to switch state (stuck), or any of the shift clocks failed to work, the output will appear to be stuck at one logic state.