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Mesa Etch Power Device Using Selective Backside Electroplated Metallurgy Disclosure Number: IPCOM000069365D
Original Publication Date: 1978-Apr-01
Included in the Prior Art Database: 2005-Feb-20

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Laff, RA Oleszek, GM [+details]


In this simplified fabrication process for inverse mesa-etched (backside etched) power device structures, no backside photolithography or chemical etching of SiO(2) and backside metallurgy is needed to define the etchant mask which defines the chip geometry. This process reduces the complexity of wet-chemical processing, since ion-implanted regions define the areas of backside metal plating rather than photolith-chemical etching processing. Moreover, the backside metallurgy is plated, an inexpensive process. The backside plated metallurgy defines the mesa-etched chip geometry.