Branch Indirect Instruction
Original Publication Date: 1978-Apr-01
Included in the Prior Art Database: 2005-Feb-20
The two-byte BRANCH INDIRECT (BI) instruction 10 in the above figure uses its 8-bit immediate field (I) to index into a branch table 11 of branch addresses designated by a control register 12. Each four-byte entry in a table 11 contains a branch address which is used to replace the instruction address (IA) in the current PSW, checking that the high order byte (in PSW bits 32-40) is zero. The BI instruction contains two essential properties: 1. It is two bytes long and can therefore overlay any instruction in a set in which the smallest is two bytes long. 2. Apart from the control register (which is preset by the operating system) and the current instruction address (IA), the instruction neither uses nor modifies any of the machine states in branching to one of 256 points.