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Integrated AND Inputs on XOR Macro Circuitry

IP.com Disclosure Number: IPCOM000069389D
Original Publication Date: 1978-Apr-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Nicholson, JO [+details]

Abstract

The integrated circuitry basically comprises two AND circuits 4 and 5 feeding an exclusive OR circuit 6, providing a sum output on line 7, with inputs A(1)..A(n) being applied to AND circuit 4 and inputs B(1)..B(n) being applied to AND circuit 5. Fig. 1 illustrates an FET circuit which provides logical AND functions on the two inputs of exclusive OR circuit 6.