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This is a process which maintains the dielectric planarity required for an ion-implanted transistor structure and which also provides the required dielectric thickness to achieve low wiring capacitance.
English (United States)
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Ion Implantation Process for Bipolar Transistors
This is a process which maintains the dielectric planarity required for an ion-
implanted transistor structure and which also provides the required dielectric
thickness to achieve low wiring capacitance.
Fig. 1 shows a semiconductor substrate 2 having deposited thereon an N-
epitaxial layer 4 and a thermally grown oxide layer 6 of around 800 Angstrom
thickness. Conventional isolation and subcollector regions 5 and 7, respectively,
are formed within layers 2 and 4.
In Fig. 2, photoresist layer 8 is applied, masked and developed to form an
opening over oxide layer 6 for the subcollector reachthrough region 10, which is
formed by the ion implantation of N type material, typically phosphorus, through
Boron-implanted base region 11 and upper isolation region 12 are formed in
substantially the same way, using a photoresist mask 13, as shown in Fig. 3.
In the next step shown in Fig. 4, a layer of silicon dioxide
14 is chemically vapor deposited atop the thermally grown oxide layer 6. The thickness of layer 14 is, typically, around 1500 Angstroms.
Deposited atop oxide layer 14 is a thin layer of silicon nitride 16.
An "all-contacts" photoresist layer 18 is used to form openings 20,
21 and 22 for the base, emitter and collector contacts, respectively.
The openings are formed by the plasma etching of layer 16.
Another layer of photoresist (not shown) is then applied, exposed and
developed to expose the emitter and c...