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Ion Implantation Process for Bipolar Transistors

IP.com Disclosure Number: IPCOM000069527D
Original Publication Date: 1978-May-01
Included in the Prior Art Database: 2005-Feb-20

Publishing Venue

IBM

Related People

Authors:
Barile, CA Gaind, AK Goth, GR [+details]

Abstract

This is a process which maintains the dielectric planarity required for an ion-implanted transistor structure and which also provides the required dielectric thickness to achieve low wiring capacitance.