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Driver for High Voltage Plasma Panel Using Low Voltage FET Disclosure Number: IPCOM000069546D
Original Publication Date: 1978-May-01
Included in the Prior Art Database: 2005-Feb-20

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Larsen, TA Oleszek, GM Perner, FA Suros, G Wang, PP Wolf, JW [+details]


In a plasma display panel 10, orthogonal conducting lines 12 and 14 are provided to generate a matrix of gas discharge cells 16. By sequentially stepping switch 11 and selectively operating drivers 18, the panel can be operated in the raster scan manner well known to cathode ray tubes. In order to select a gas discharge cell 16 for light-emitting excitation, a voltage, for example, of approximately 180 volts, is applied across the gas discharge gap by turning on driver 18 so as to provide a zero volt output. If the gas discharge cell is to remain in a dark unexcited state, voltage across the gas discharge gap is limited to 155 volts by providing a +25 volt output level from driver circuit 18.