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The delineation of junctions and interfaces in semiconductors in the vicinity of 1 mu of the surface can be enhanced by producing a bevel by etching.
English (United States)
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Delineating Shallow Junctions and Interfaces in Semiconductors
The delineation of junctions and interfaces in semiconductors in the vicinity
of 1 mu of the surface can be enhanced by producing a bevel by etching.
The technique is illustrated in connection with the figure with a description for
the material GaAs.
A resist pattern is applied, and a channel is etched. The etch may be 9:1:27
H(3)PO(4):HNO(3):H(2)O for 2 hours at 65 degrees C, which produces a channel
depth of 5-10 mu. The profile of the side of the channel is dependent upon the
etch rate and temperature. The etch will undercut the resist at an angle of
approximately 5 degrees, and permits geometric magnification of the junction
delineation. The resist may be removed with acetone, and the oxide may be
removed by ultrasonic agitation while immersed in 0.5 N KOH.
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