Browse Prior Art Database

Parity Generation at ROS Output

IP.com Disclosure Number: IPCOM000069780D
Original Publication Date: 1978-Jun-01
Included in the Prior Art Database: 2005-Feb-21

Publishing Venue

IBM

Related People

Authors:
Gladstein, LA Love, RD [+details]

Abstract

This article describes a technique for reducing the memory size of a ROS LSI circuit while still providing a parity checked output.