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Phase Alignment of 1F and 2F Clocks Disclosure Number: IPCOM000069816D
Original Publication Date: 1978-Jun-01
Included in the Prior Art Database: 2005-Feb-21

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Related People

Beckenhauer, RL Schaeuble, WJ [+details]


The figure shows a circuit arrangement for phasing a 1F clock relative to a 2F clock and a serial stream of bits which have been encoded in a 2-7 fixed rate run-length limited code.