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AC Powered Pulse Generator for Latching Logic

IP.com Disclosure Number: IPCOM000069860D
Original Publication Date: 1978-Jun-01
Included in the Prior Art Database: 2005-Feb-21

Publishing Venue

IBM

Related People

Authors:
Davidson, A [+details]

Abstract

The basic circuit 1 of this article is shown in Fig. 1. Circuit 1 is a circuit incorporating Josephson devices for generating pulses of controlled length using AC powered latching-logic circuits. Circuit 1 is a modified dynamic flip-flop incorporating interferometers Q1, G2, wherein (a) AC power is supplied via impedance R(S), (b) logic type ground returns are used, (c) the flip-flop is of the extremely asymmetric type with only one interferometer branch (Q2) having fanout and (d) a second fanout is taken in the branch which includes the damping resistor R(D)