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Integrated Circuit Full Wafer Diagnostic using Special Test Stage for Scanning Electron Microscope Disclosure Number: IPCOM000069949D
Original Publication Date: 1978-Jul-01
Included in the Prior Art Database: 2005-Feb-21

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Groeninck, JM Lecorneur, P [+details]


This technique uses a specially designed test stage operating inside the scanning electron microscope (SEM). This stage which handles up to 82 mm wafers is compatible with commercially available 70-probe test cards.