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Execution of Intermediate Level Code From Multiple Address Spaces, with Application to a Shared Variable Language Processor in APL

IP.com Disclosure Number: IPCOM000070028D
Original Publication Date: 1978-Jul-01
Included in the Prior Art Database: 2005-Feb-21

Publishing Venue

IBM

Related People

Authors:
Capps, AB Kostuch, DJ [+details]

Abstract

High-level programming languages ease the task of the language user, but often at the cost of slower execution or greater memory usage. In many cases, a compromise can be made by coding a frequently used operation directly in a lower-level or machine language, and then invoking that operation from within the high-level language (HLL). A major difficulty in implementing this concept is that the HLL interpreter or compiler usually resides in read-only storage (ROS), while the user-written routine must be placed in read-write memory. In an example system, programs written in APL and stored in read-write memory may be converted by a ROS-based interpreter to IBM System/36O assembly-language (AL) operations, which are then converted by a ROS emulator for execution by a microprocessor.