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High Performance Sense Amplifier Circuit

IP.com Disclosure Number: IPCOM000070068D
Original Publication Date: 1978-Jul-01
Included in the Prior Art Database: 2005-Feb-21

Publishing Venue

IBM

Related People

Authors:
Schuster, SE [+details]

Abstract

This article describes a high performance, low-power dynamic sense amplifier with only two clocks. One clock is required for precharging the bit lines, and a second clock is used for sensing the information on the bit line and restoring the information to the memory cell. The circuit schematic and clock waveforms for the sense amplifier are shown in Figs. 1 and 2.