Injected Charge Capacitor Memory with Improved Signal
Original Publication Date: 1978-Aug-01
Included in the Prior Art Database: 2005-Feb-21
This semiconductor memory produced in a unipolar technology has cells of the type described in U. S. Patent 4,040,017 but with an increased signal magnitude, decreased bit line capacitance and more uniform bit line capacitance. These improvements are produced by providing N+ diffusion regions 10 in the P type semiconductor substrate 12 under the bit/sense lines B1, B2, B3 and B4, as illustrated in Fig. 1, and by utilizing the pulse program, as indicated in Fig. 2.