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Dual Process Status Words Per Interrupt Level

IP.com Disclosure Number: IPCOM000070171D
Original Publication Date: 1978-Aug-01
Included in the Prior Art Database: 2005-Feb-21

Publishing Venue

IBM

Related People

Authors:
Barton, RE Desautels, JC Temple, JL [+details]

Abstract

Fast program switching between an application program and a control program running at the same priority level is facilitated by the provision of two Process Status Words (PSWs) per prioritized interrupt level. With the aid of a PSW Control Register (PCR), a Current Process Latch (CPL) and appropriate instructions, a mechanism is provided for determining which PSW is to become active when entering a level and for determining where to store the current PSW when program switching. A feature of the mechanism is the capability of handling higher level interrupts prior to performing the first instruction of a newly swapped PSW.