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Schottky Damped Emitter Stabilized Direct Coupled Transistor Logic

IP.com Disclosure Number: IPCOM000070259D
Original Publication Date: 1978-Aug-01
Included in the Prior Art Database: 2005-Feb-21

Publishing Venue

IBM

Related People

Authors:
Solomon, PM [+details]

Abstract

Logic circuits of the direct-coupled transistor logic (DCTL) type have been sensitive to input voltage variations and circuit tolerances when emitter resistance and speed-up capacitance are included to control saturation. The input voltage and circuit tolerance sensitivity can be reduced by the introduction of a Schottky barrier diode in parallel with the collector resistance, as illustrated in the figure, where RE is the emitter resistance, C(E) is the speed-up capacitance, and D is the Schottky barrier diode.