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# Efficient Arithmetic Apparatus and Method

IP.com Disclosure Number: IPCOM000074904D
Original Publication Date: 1971-Jun-01
Included in the Prior Art Database: 2005-Feb-24
Document File: 3 page(s) / 42K

IBM

## Related People

Tien Chi Chen: AUTHOR

## Abstract

Arithmetic evaluation of functions such as exponential, logarithm, quotient, and square root can be efficiently achieved with a minimum of multiplications and divisions by the method and device described below. Basically, use is made of the fact that for a binary number x and a positive integer m, the term x (1 +/- 2/-m/) can be evaluated by a shift followed by an add.

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Efficient Arithmetic Apparatus and Method

Arithmetic evaluation of functions such as exponential, logarithm, quotient, and square root can be efficiently achieved with a minimum of multiplications and divisions by the method and device described below. Basically, use is made of the fact that for a binary number x and a positive integer m, the term x (1 +/- 2/- m/) can be evaluated by a shift followed by an add.

A function of x can be represented by a pair of quantities (x(k), y(k)): z = f(x) = g (x(k), y(k)). Stepwise altering of x towards unity by computing x' = x (1 + d) = x (1 + 2/-m/), and stepwise adjusting of y to preserve the value of the function, will finally lead to z = g (1, y(n)) = y(n). This is the basic procedure for evaluating logarithm, division, and square root. A closely similar one is used for exponential. Illustrations are given below:

(Image Omitted)

In all cases, d = +/- 2/-m/ is stepwise changed until a given maximum of m (minimum of d) is reached.

A block diagram of a device for executing the described method is shown. It will be explained in connection with the procedure for logarithm evaluation. The task is to compute, in iterative steps, the quantities x' = x(1 + d) and y' = y - 1n (1 + d), with d = 2/-m/.

X Register 3 and Y Register 5 are loaded over input bus 1 with the initial values of X and Y (Y = ), initially). Both registers are connected over bus 7 to left-bit counter 9 which determines the number of leading zero bits in (1 - x). By adding 1 to this number, m is obtained and kept in storage 11. For a given value of m, x . 2/-m/ = x . x can be simply obtained by using shift register 13 with x and m as input. The value of -1n (1 + d) for a given m is obtained by addressing storage 15 with m.

An adder 27 with accumulator 29 is provided having input 35 from registers 3 and 5 and input 25 from shift register 13 and stored table 15. The accumulator output is connected b...