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# Binary Counter Circuit

IP.com Disclosure Number: IPCOM000083045D
Original Publication Date: 1975-Mar-01
Included in the Prior Art Database: 2005-Feb-28
Document File: 2 page(s) / 42K

IBM

## Related People

Herrell, DJ: AUTHOR [+1]

## Abstract

A binary counter stage is defined as a circuit which, when an input waveform of frequency f is applied, produces an output of frequency f/2.

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Binary Counter Circuit

A binary counter stage is defined as a circuit which, when an input waveform of frequency f is applied, produces an output of frequency f/2.

Fig. 1 shows a configuration of such a binary counter utilizing two Josephson tunneling devices A,B. Devices A and B are connected as a parallel flip-flop with a common input control line Z. Assume A carries all the gate current I1 initially (current in B = 0). A short current pulse 12 applied to control line Z switches device A from A to A' and B to B' on the gain curve shown in Fig. 2. Consequently, A is in the voltage state and switches the gate current I1 to B branch. Similarly, a second short pulse, I2, reverses the operation and a binary counter circuit operation is established. The reason for the short input pulse is to ensure that each switching operation is one way and stable.

Fig. 3 shows another design which utilizes the devices in an anti-parallel operating mode. A self-bias control provided by loop portion y is needed to ensure satisfactory gate operation. The self-bias controls can be also replaced by a common DC bias, using a separate conductor. The gain curve of Fig. 4 shows the operation of the circuit of Fig. 3. Thus, assuming device C carries all the current, I(3), that device is self-biased to point C. The application of pulse I4 switches the operating point to C' and device C assumes the voltage state. Device D remains within the gain curve D-D' and does not switch. A second pulse, I(4), now switches device D such that device C again carries all the gate current, I(3).

Several stages of binary counters can be cascaded to perform counting ...