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# One Shot Circuit with Zero Steady State Power Dissipation

IP.com Disclosure Number: IPCOM000087108D
Original Publication Date: 1976-Dec-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 38K

IBM

## Related People

Maillet, JC: AUTHOR

## Abstract

The drawing shows a one-shot circuit for providing pulses C of calibrated width from the positive or negative transitions of an input signal A.

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One Shot Circuit with Zero Steady State Power Dissipation

The drawing shows a one-shot circuit for providing pulses C of calibrated width from the positive or negative transitions of an input signal A.

The input signal is applied to the differentiating circuit comprising capacitor 1 and resistor 2, providing voltage B on node b. The output pulse has a width determined by the positive threshold + V(BE) and the negative threshold - V(BE).

Resistor R(1) with transistor T(1) work as a first voltage-to-current converter having + V(BE) threshold voltage, and resistor R(1) with Darlington pair T(2) and T(3) work as a second voltage-to-current converter having - V(BE) threshold voltage. Transistors T(4) and T(5) constitute a current mirror.

Consequently, when the voltage on node b is higher than +V(BE) or lower than -V(BE), transistor T(1) or transistors T(2) and T(3) are conductive. Diode- connected transistor T(6) turns on transistor T(7) and a current flows through T(7) and T(8) causing the output voltage to be equal to V(REF). When transistor T(1) and transistors T(2) and T(3) are off, transistors T(6), T(7) and T(8) are off and the output voltage is equal to V(LOG).

Depending upon the value of V(REF) and V(LOG), various logical output levels can be generated.

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