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Exponential Unit Disclosure Number: IPCOM000091123D
Original Publication Date: 1969-Nov-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 3 page(s) / 53K

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Senzig, DN: AUTHOR [+2]


This algorithm and apparatus evaluates the exponent of the natural constant e.

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Exponential Unit

This algorithm and apparatus evaluates the exponent of the natural constant


In the development of the algorithm using 24-bit fraction numbers, consider e/x/ = 2/x log(2)e/, write x log(2) e = n+r where n is the integer and r is the fractional part. In e/x/ = 2/n/.2/r/, -1<r<1, n is the exponential part of the result in binary floating point arithmetic. For 2/r/ = e/r log(e)2/ = e/+/-x(0)/, e/x(0)/ is evaluated by this method.

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The total error introduced is less than 30.2/-30/</-25/. Thus, the first 24 bits, places, are accurate.

In apparatus for employing the algorithm of equations 3 and 4, a 32-bit input bus 1 is connected to accumulator 3. Line 5, which contains the sign bit of the input, is connected to flip-flop 7. The 1 output of flip-flop 7 is connected to single precision adder-subtracter 11 via line 9. The latter controls whether adder- subtracter 11 is in an add or subtract mode, dependent upon the sign of the input. The output of accumulator 3 is connected to gate 15A and is also used as multiplier and multiplicand inputs to multiplier 13. A value of unity is connected as an input to gate 15B. The output of multiplier 13 is connected to right-shifter 17, the output of which is connected as an addend-subtrahend to adder- subtracter 11. Counter 19, initialized to a count of 30, is also provided. Line 21A, indicating that the count is not zero, is connected from counter 19 to enable gate 15A. Line 21B, indicating that the count is zero, is connected to enable gate 15B. Line 23, indicative of the value of the count, is connected to shifter 17 to indicate the number of positions the input is to be shifted right...