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# Hybrid Ring Logic

IP.com Disclosure Number: IPCOM000097605D
Original Publication Date: 1961-Mar-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 43K

IBM

## Related People

Hoernes, GE: AUTHOR

## Abstract

Hybrid rings in tree configuration provide multi-input majority information in a logic system where phase is the data bearing variable.

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Hybrid Ring Logic

Hybrid rings in tree configuration provide multi-input majority information in a logic system where phase is the data bearing variable.

In phase logic systems, an unweighted, multi-input, phase locked oscillator is desirable. Such an oscillator is difficult to realize due to the tolerances of the various inputs.

In voltage addition devices such as hybrid rings, if power P is applied at input a, the power splits evenly and P/2 appears at both outputs e and f. Where the characteristic impedances of input lines a and b and output lines e and f are the same, E out at output f is E(in)sqrt2. If phase reversal is denoted by the changed signs of E, the following equations are derived: E(e) = (E(a)/sqrt2) - (E(b)/ sqrt2)

E(f) = -(E(a)/ sqrt2) - (E(b)/ sqrt2)

The output voltage E out of the hybrid ring is the true algebraic sum of the input voltage E.

The hybrid ring tree produces a single input to a phase locked oscillator which then acts as a multi-input oscillator.

Data inputs E1 through E8 are conditioned by equal voltage signals which reflect data by being either in phase or out of phase with a reference. The inputs, applied to HR 1... 4, produce resultant inputs to HR 5... 6 which in turn produce inputs to HR 7.

The equation for the resulting voltage is:

E HR(7) = K(E(1) + E(2) + E(3)....+E(8)),

K = (-1/sqrt2)/n/ number of stages

E HR(7) = (-1/2*sqrt2) (E(1) + E (2) + E (3)...+ E (8))

The phase of the output voltage is the true majority of the phas...