Browse Prior Art Database

Coordinating Fetches And Stores So As to Access Ex Lines

IP.com Disclosure Number: IPCOM000099825D
Original Publication Date: 1990-Feb-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 2 page(s) / 73K

Publishing Venue

IBM

Related People

Authors:
Emma, PG Knight, JW Pomerene, JH Rechtschaffen, RN Sparacio, FJ [+details]

Abstract

The interaction between a processor and memory occurs both locally and globally. The architecture specifies the relationship between asynchronous processes who derive the necessary synchronization from the relative ordering of interactions between processors and memory.