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Cubic Chip Assembly Disclosure Number: IPCOM000101628D
Original Publication Date: 1990-Aug-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 3 page(s) / 76K

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Related People

Schettler, H: AUTHOR [+2]


A cubic chip assembly mounted on a silicon substrate is described.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Cubic Chip Assembly

       A cubic chip assembly mounted on a silicon substrate is

      Fig. 1 shows a chip 1 designed for such a cubic assembly.  In
the described embodiment, C4 pads 2 are arranged on two opposite
sides of chip 1 outside the active chip area 3 closely adjacent to
the chip border.  Pads 2 are symmetrically congruent.  Two opposite
pads 2 are connected by a chip wire.  This is useful for memory
chips, as it allows using only one part number.  The chips are
processed, tested and diced in a state-of-the-art process.

      Two chips 1 are soldered to each other as shown in Fig. 2.  The
C4 pads 2 connect the two chips to each other and to the outside.
The symmetrical arrangement of common and interchangeable I/O pads
mates identical pad functions, yielding a double-density functional

      The chip pair of Fig. 2 is accurately adjusted by the
self-aligned C4 process.  As the chip cutting edges may be rough, the
next processing step is to polish the chip pair on the top and bottom
sides.  Polishing must extend right through to the C4's.  The C4
metal (PbSn) is on the surface (Fig. 3).  To render all pads 2
accessible, the polishing machine is accurately adjusted to the C4

      As all C4's are accessible from the outside, the chip pair is
retested at this stage to guarantee fully functional chip pairs
before starting the next process step.

      N chip pairs (say, 5) are aligned in a mechanical frame and
glued together, forming a cube of 2 N chips (Fig. 4). Exact
dimensions of the C4 array on the cube are obtained by...