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Mechanism for Variable Speed Clock Based on an Incrementing Oscillator Disclosure Number: IPCOM000104129D
Original Publication Date: 1993-Mar-01
Included in the Prior Art Database: 2005-Mar-18
Document File: 4 page(s) / 113K

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Related People

Kramer, PH: AUTHOR


A method for building a variable speed time/date clock is disclosed. Characteristics of this clock include:

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 51% of the total text.

Mechanism for Variable Speed Clock Based on an Incrementing Oscillator

      A method for building a variable speed time/date clock is
disclosed.  Characteristics of this clock include:

o   The ability to dynamically set it to a specific time/date.

o   The ability to speed it up or slow it down over a period of time
    in a non-abrupt fashion.  As an example, suppose we want to speed
    up a clock by 4 seconds.  A non-abrupt modification might change
    the clock by the 4 seconds over the next 100.  Abruptly changing
    the clock could prematurely set off interval timers for things
    like record lock-wait timers.

      To provide the required function requires the definition and
use of 4 registers.  These will be called:

o   oscillator register (OR)
o   clock register  (CR)
o   increment register (IR)
o   count down interval register (CD)

      The functions of these registers are as follows:

o   The oscillator register is tied to an oscillator and is a
    constantly incrementing register.  Register width is such that it
    will never wrap.  The register is assumed to be incrementing with
    a frequency that is significantly faster than the user required
    clock resolution.  For example, the oscillator register might
    register time in hundred nano-second increments versus the clock
    resolution which may be in milliseconds.

o   The clock register contains the value to be returned when a clock
    read is requested.  The clock register width is the same as the
    oscillator register.  The clock register is only accessible to a
    user via a read operation.

o   The increment register contains a value that is normally added to
    the clock register at a regular interval.  A secondary operation
    allows this value to directly replace the current clock value.
    The increment register can either be set by a user or to a
    specific hardwired default value (default increment value).

o   The count down register is used to track the number of times the
    increment register is to be added to the clock value before the
    contents of the increment register is reset to a hardwired
    default value.  The count down register can be set by a user to
    some non-negative value.  If the value of the register is
    positive, the value is decremented each time the clock register
    is updated until the value reaches 0.

      For descriptive purposes, assume that the clock value is
updated whenever the low order bits of the oscillator register are
incremented to a value of 1000B.  Also, for simplicity we will assume
that 1000B stands for 1 millisecond.  The default increment value
will then also be 1000B.  This means that normally the clock register
increments at the same rate as the oscillator register.  If the count
down register contains a positive value, it will be decremented at
the same time the cl...