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# Functional Comparisons of Logic Designs

IP.com Disclosure Number: IPCOM000108208D
Original Publication Date: 1992-May-01
Included in the Prior Art Database: 2005-Mar-22
Document File: 2 page(s) / 75K

IBM

## Related People

Berman, CL: AUTHOR [+1]

## Abstract

This article describes a technique for establishing equivalence of signals within a combinational circuit. The method consists of two steps. First, using random simulation, construct a list of pairs of signals (called potential equivalences) which may possibly carry identical or complementary functions. (These are signals which simulate identically or anti-identically on a large number of randomly chosen inputs.) Second, process the list of potentially equivalent signals (found in step 1) in a breadth-first manner (from inputs to outputs), checking each pair for equivalence using the method described below. If a pair is found to be equivalent, use it to update the list of actual equivalence classes.

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Functional Comparisons of Logic Designs

This article describes a technique for establishing
equivalence of signals within a combinational circuit.  The method
consists of two steps.  First, using random simulation, construct a
list of pairs of signals (called potential equivalences) which may
possibly carry identical or complementary functions.  (These are
signals which simulate identically or anti-identically on a large
number of randomly chosen inputs.)  Second, process the list of
potentially equivalent signals (found in step 1) in a breadth-first
manner (from inputs to outputs), checking each pair for equivalence
using the method described below.  If a pair is found to be
equivalent, use it to update the list of actual equivalence classes.

Initially, the list of actual equivalences contains one class
for each primary circuit input.  At step i, the method uses the
current list of actual equivalence classes to test a pair of signals
(s,t) (potential equivalences) for equivalence and, if the signals on
the list are equivalent, update the list of actual equivalence
classes as follows. If neither signal occurs in any equivalence
class, create a new class consisting of the two signals just found to
be equivalent.  If exactly one signal is in an equivalence class, add
the other signal to its equivalence class.  If both signals are in
equivalence classes, merge the classes to which they belong.  In all
cases, choose an element of the new equivalence class closest to the
primary inputs to be used as representative of the class.  The
resulting list of actual equivalences is used in step (i+1).

Testing a pair of potential equivalences for a... 