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C-4 Pad Enhancement using Machine Vision Algorithms Disclosure Number: IPCOM000108388D
Original Publication Date: 1992-May-01
Included in the Prior Art Database: 2005-Mar-22
Document File: 5 page(s) / 189K

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Pack, TJ: AUTHOR [+2]


This article describes a technique which includes several image processing algorithms to identify and precisely locate C-4 pads on silicon chips.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 42% of the total text.

C-4 Pad Enhancement using Machine Vision Algorithms

       This article describes a technique which includes several
image processing algorithms to identify and precisely locate C-4 pads
on silicon chips.

      The technical problem is to remove the effects of background
variations and specular reflections from the image so that the edges
of the pad can be found.  Once the image has been enhanced, then the
center of mass can be accurately located.  There are
hardware/software systems available which provide various image
transformation algorithms for edge enhancement such as Roberts or
Sobel filters.  These types of algorithms require a larger amount of
image processing.

      The packaging of semiconductor devices requires a precise
mechanical alignment between the C-4 pads of a chip and the
respective points of electrical contact on a substrate.  As chip
technology progresses (e.g., greater density, larger chip sizes,
smaller batch sizes, etc.), machine vision and other optical
alignment techniques are becoming necessary to meet the tolerance,
flexibility and throughput requirements of many chip placement

      Many of the problems associated with machine vision and optical
alignment techniques involve the task of precisely locating
individual C-4 pads on the photoetched surface of the chip.  Often,
C-4 pads are surrounded by dense photoetched circuitry.  In order to
accurately determine the location of the chip, the machine vision
system must be able to clearly distinguish between C-4 pads (normally
circular but often slightly irregular) and the photoetched circuitry.
Also, as the variety of chip types increases, the alignment algorithm
must be capable of compensating for a wide variety of C-4 pad
patterns, background conditions and other irregularities in the
quality of an image of C-4 pads that would induce error in the final
chip placement.

      To develop an algorithm for enhancing the signal (C-4 pads) to
noise (background circuitry) ratio, the C-4 pads and background noise
are characterized by sampling the images of C-4 pads on a variety of
logic and memory chip types.  The observations were summarized and
included in the following basic assumptions.
1.   C-4 pads are circular and, where distorted (by physical
contact), evenly distributed.
2.   The intensity mass of a C-4 pad greatly exceeds that of any
other dark object in the field of view of the camera.
3.   Background circuitry is random but uniformly distributed and
4.   The pad tolerance is well beyond (in the order of a magnitude)
the placement accuracy requirements for the system.
5.   The initial presentation of the chip to the alignment system is
within the tolerance defined by the period of the C-4 pad pattern
(typically 10 mil spacing between pad centers).
Accordingly, the chip alignment algorithms described herein are
developed for a mechanical chip placement device which meets these
requirements.  If any...