Browse Prior Art Database

Planarized Metallized Field Effect Transistor

IP.com Disclosure Number: IPCOM000110054D
Original Publication Date: 1992-Oct-01
Included in the Prior Art Database: 2005-Mar-25
Document File: 4 page(s) / 115K

Publishing Venue

IBM

Related People

Authors:
Bronner, G Davari, B Ginsberg, B Joshi, RV [+details]

Abstract

A technique is described whereby a field-effect transistor (FET) structure and fabrication process provides the ability to convert source-drain epi and gate poly-silicon to tungsten in one step, thereby lowering the sheet resistance. Minimal differential height between source and drain is produced.